1. Field of the Invention
The present invention relates generally to electrostatic discharge (ESD) protection in integrated circuit (IC) packages, and more particularly, to the use of silicon controlled rectifier devices as ESD protective devices.
2. Background Art
Electrostatic discharge (ESD) is a movement of static electricity from a nonconductive surface, which could cause damage to semiconductors and other circuit components in ICs. A person walking on a carpet, for instance, can carry an amount of electrostatic charge up to several thousands of volts under high humidity conditions and over 10,000 volts under low humidity conditions. When touching ICs by hand, the instantaneous power level of the ESD could cause severe damage to the ICs. CMOS (complementary metal-oxide semiconductor) logic ICs are especially vulnerable to ESD.
To protect IC packages against ESD damage, various solutions have been proposed. One solution suggests the provision of an ESD protective device (also referred to herein as xe2x80x9cESD cellxe2x80x9d) between the internal semiconductor devices in the IC chip (hereinafter referred to as xe2x80x9cinternal circuitxe2x80x9d) and the corresponding bonding pad, as illustrated in FIG. 1. Under normal circumstances, the circuit in FIG. 1 operates as if the ESD cell is not present, so that the bonding pad directly couples the internal circuit. However, when a high voltage pulse (i.e., voltage in kvs) occurs, the ESD cell will shunt the current from the bonding pad away from the internal circuit, thereby protecting the internal circuit from damage.
Recently, silicon controlled rectifier (SCR) devices have been used as ESD cells because SCR devices can switch from very high impedance states to a very low impedance state. FIG. 2 illustrates a conventional SCR device, and FIG. 3 illustrates the voltage vs. current characteristics of a conventional SCR device. Referring to FIG. 3, the current rises very slowly as voltage increases, until the SCR device hits a switching voltage Vs. From Vs, the voltage decreases as the current rises slowly, until the SCR device reaches a xe2x80x9cholding pointxe2x80x9d P. At this holding point P, the voltage will generally stay the same (or rise very slowly) even as the current increases drastically. As used herein, the term xe2x80x9clatchupxe2x80x9d means the part of the curve in FIG. 3 that is above the holding point P.
One significant drawback with the use of SCR devices as ESD cells is that SCR devices are susceptible to latchup caused by non-ESD events, such as other noise triggers. As a result, this susceptibility to latchup often requires further trade-offs in circuit design to optimize ESD robustness and latchup immunity.
Thus, there still remains a need for an SCR device that is capable of being used as an ESD cell, and where latchup of the SCR device caused by non-ESD events is minimized or eliminated.
It is an object of the present invention to provide an improved SCR device for use as an ESD cell.
It is another object of the present invention to provide an SCR device where latchup will only occur when ESD occurs.
In accordance with the foregoing and other objectives of the invention, the present invention provides an SCR cell structure that has a plurality of divided p+ and n+ blocks, with the spacing, sizes and locations of these divided p+ and n+ blocks being varied or adjusted to minimize latchup caused by non-ESD events. To further minimize latchup caused by non-ESD events, the SCR cell structure can also provide a plurality of divided blocks of Nwell and Psub pickup contacts, and varying the spacing, sizes, shapes and locations of these divided blocks of Nwell and Psub pickup contacts. In addition, the spacing of contact holes within the pickup contacts can also be varied to further minimize latchup caused by non-ESD events.